Multi-inverter control apparatus

ABSTRACT

In a multi-inverter system, inverters in series are swapped around in order to eliminate regenerative power due to phase difference between consecutive inverters in series.

RELATED PATENT APPLICATION

The present invention is related to patent application Ser. No. 871,048filed concurrently with this application, and entitled "High VoltageModular Inverter". The cross-referenced patent application is herebyincorporated by reference.

BACKGROUND OF THE INVENTION

As disclosed in the cross-referenced patent application, it has beenproposed to assemble in series a plurality of single-phase inverters inorder to put together a high voltage modular multi-inverter system. Itis also disclosed in the cross-referenced patent application to controlthe inverter modules in such modular multi-inverter system, eitherindividually or in concert.

Single-phase inverter modules can also be connected in series to achieveharmonic cancellation. See for instance U.S. Pat. No. 4,063,143. Withinverters connected in series, a problem arises when they are operatedat different phase angles and the load current lags by more than onehalf the angle between the inverter operative phases. Assuming twoinverters in series, when this situation occurs, the inverter which hasa voltage leading the load current will regenerate, because the loadcurrent lags its associated voltage waveform by more than 90°, e.g.there is a component of active current which is negative. However, suchregenerative power cannot be derived from the load, it will be takenfrom the other inverter which is lagging. The net power delivered to theload being the sum of the power outputted by both inverters, it will bethe result of one positive output flow of power and one negative outputflow of power. The latter, which is regenerative, should be returnedtoward the AC input lines of the converter-inverter. If this is notprovided for, the DC link capacitor will be charging-up with the risk ofdamaging the inverter if not stopped in time.

The present invention provides a solution to this problem byimplementing a simple and attractive control of inverters connected inseries and operated with a phase shift between the inverter outputtedvoltages. This solution is more desirable than the practice known in theprior art of using inverters sharing a common DC link and an outputtransformer summing the operations, the regenerated power from theregenerating inverter being passed through via the DC link. The majorobjection here, is the use of output transformers because of the sideeffects for motor drive applications, especially variable frequency.

SUMMARY OF THE INVENTION

The invention relates to multi-inverter systems including at least afirst and a second inverter having their output voltages connected inseries.

The invention provides for exchanging the functions of said first andsecond inverters recurrently, thereby to prevent a phase shift betweenthe output voltages from afffecting the operation.

Preferably, the inverter functions are exchanged by recurrentlyexchanging the controls between the respective inverters.

The invention is applicable to inverter system wherein a phase shiftbetween inverters in series is intended, for instance in order toeliminate harmonics.

Recurrent exchanging of inverter functions according to the inventionmay be effected periodically, or asynchronously.

The invention is applicable to a plurality of inverters in series, insuch case, recurrent function exchanging is effected by pairs ofconsecutive inverters in the string, and on a distributive and regularbasis, by successive permutations.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows an arrangement in series of two inverters illustrated inthe situation of a single-phase output;

FIG. 2 illustrates with curves the individual and resultant voltages,and the load current in the instance of FIG. 1;

FIG. 3 is a vectorial representation of the regenerative effect on oneinverter of a phase shift between the individual inverters of FIGS. 1and 2;

FIG. 4 illustrates with curves a method of elimination of theregenerative effect of FIG. 3 according to the present invention;

FIG. 5 is a block diagram illustrating the implementation of the methodof FIG. 4 for the purpose of illustration only;

FIG. 6A shows a digital implementation of a phase shift between thecontrol operations of the two inverters of FIGS. 1 and 2; FIG. 6Billustrates with curves the signals involved therein;

FIGS. 7A and 7B show a digital implementation of the method achievingthe effect of FIG. 4 with the control waveform and the inerterconnection of FIGS. 1 and 4.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 1, two inverter modules MD1 and MD2, as disclosed inthe incorporated by reference copending application are shown with theiroutput voltages V₁, V₂ connected in series. Only two modules are shown,for the sake of simplicity. For illustration purpose, voltages V₁, V₂are connected to the outside, over with the neutral line N, for V₂, theother with the phase line A, for V₁, the junction points being J₁₁ ininverter MD1, and J₂₂ in inverter MD2. Module MD1 includes four GTOdevices connected in pairs (GTO1, GTO3), (GTO2, GTO4), between DC linkterminals TA₁, TB₁, the junction points being J₁₁ and J₁₂ for therespective poles. The same type of module exist with module MD2, the DClink terminals being TA₂, TB₂ and the junction points J₂₁, J₂₂.

The GTO devices have mounted in antiparallel fashion diodes D for eachpair, as generally known. The DC link voltages of the voltage sourcesare V_(DC1) and V_(DC2) for the respective modules MD1, MD2.

Voltages V₁, V₂ outputted by the respective inverters are square wavesaccording to the duty-cycle of the control circuits GD1, GD2 of the GTOdevices for the respective modules. Thus the frequency is selected.Alternatively TA₁, or TB₁, are connected to J₁₂, and alternatively TA₂or TB₂ are connected to J₂₁. Similarly, (TA₁ or TB₁) and TA₂, or TB₂ arealternatively connected to J₁₁ and J₂₂ which are connected together.Therefore, the resultant voltages V₁ and V₂ can reach either +(V_(DC1)+V_(DC2)) or -(V_(DC1) +V_(DC2)). This is general knowledge.

It is assumed that control of modules MD1 and MD2 is effected with acertain phase shift as shown by curves V₁ and V_(w) under (a) on FIG. 2.Therefore, the resultant voltage (V₁ +V₂) is a quasi-square curve.Assuming an inductive load between line A and line N, the load currentwill increase linearly when (V₁ +V₂)=+(V_(DC1) +V_(DC2)). It will notchange when (V₁ +V₂)=0, and it will decrease linearly when (V₁+V₂)=-(V_(DC1) +V_(DC2)). This is shown by curve (c) in FIG. 2.

Such operation with two single phase inverters connected in series atdifferent phase angles may be done for harmonic cancellation, or forvoltage regulation. When this is performed, though, regeneration mightoccur as shown in FIG. 3. V₁ and V₂ are two vectors at an angle αresulting from the aforesaid phase shift difference in controlling MD1and MD2. The resultant voltage V_(AN) is the vector V, joining theorigin of V₁ and the extremity of V₂. Rectangular coordinates X₁, Y₁ areshown with vector V₁ from the origin O on the abscissa. X₂, Y₂ arerectangular coordinates chosen with the nine origin O for V₂, withvector V₂ parallel to the abscissa thereof. Assuming a load currentvector I as shown, namely with a lagging angle P relative to V, suchload current is oriented relative to vectors V₁ and V₂ differently, asshown. It appears that with regard to MD1, the load current lags itsvoltage V₁ by more than 90°. In other words, there is a negativecomponent (vector I_(A1)) representing active current and, therefore,real power (I_(A1) ×V₁) which is regenerative power. In other words,inverter MD1 (output V₁ in association with load current I) is leadingby more than 90°. However, the inverter will be unable to regeneratepower back to the input side, because the DC link circuit does not allowthis, unless special provision is made for returning the regeneratedpower to the input lines. The other inverter (MD2) is lagging anddelivers real power to the load. The net power delivered to the load,namely the sum of the power from MD1 and MD2 is the result of a powerflow to the load (positive) and a negative power flow.

Unless, negative power is returned to the AC input, the DC linkcapacitor will charge-up, and unless the inverter is stopped, there willbe a failure of the inverter.

One solution with inverters operated with different phase angles, whilesharing a common DC link, is to use output transformers effectingsummation, so that the regenerated power from the regenerating invertercan be passed to the power source inverter via the DC link. However,output transformers have many undesirable effects in motor driveapplications.

Considering FIG. 4, curves (a) show the two voltages V₁ and V₂, like inFIG. 2, when there is a phase shift between the output squared voltagewaves. In accordance with the present invention, the roles of MD1 andMD2 are alternately reversed so that the leading inverter becomes alagging inverter and, conversely, successively between AB, then betweenBC, then between CD etc., as shown with curves (b) for V₁ and V₂. Thus,if at time t_(A), the front edge of V₁ precedes the front end of V₂, attime t_(B) suddenly, the front edge of V₂ is preceding the front edge ofV₁. Similarly, at t_(C) the front edge of V₁ reverts to leading thefront edge of V₂, while at t_(D) again, the front edge of V₂ leadsrelative to the front edge of V₁, and so on. As a result, if we comparethe current I_(L) under (d) with the current I_(L) of FIG. 2, the linearportions, are shorter, since the higher and lower plateaux of (V₁ +V₂)(under (c)) are shorter. Power is the product of I_(L) by V₁ for P₁ andof I_(L) by V₂ for P₂. Curves (e) and (f) show P₁ and P₂ in the case ofFIG. 2, whereas curves (f) and (g) show P₁ and P₂ when swapping thefunctions of MD1 and MD2, like with curves (b), (c) and (d). It appearsthat inverter MD1 is regenerative under curve (e) because the average ofP₁ is negative due to the horizontal portion following the falling edgeof V₁, when I_(L) is constant. In the same way, for P₂ (curve (f)) theaverage of P₂ is positive for inverter MD2. Swapping the roles of MD1and MD2 results, as shown by curves (g) and (h) in alternating thepositive and negative average of P₁ and P₂ with an overall average whichis zero from A through F. It is understood in the instance of FIG. 4that the load is assumed to be fully inductive, (which is the worstsituation encountered). Therefore P_(AVG) =0 for P₁ and P₂ when theinvention swapping method is applied. It is also understood that for theseries inverter system with MD1 and MD2, P₁ +P₂ is the total powertransmitted to the load; while the swapping method forces P_(1AVG) to beequal to P_(2AVG) and conversely.

FIG. 5 is a block diagram illustrating an implementation of theinvention by exchanging the inputs and the outputs of inverters MD1,MD2, without changing their control. This requires switches SW1 for MD1,SW2 for MD2 at the input side, namely etween DC link terminals TA₁, TB₁for MD1, TA₂, TB₂ for MD2, so that (TA₁, TB₁) in position #1 feeds MD1while (TA₂, TB₂) feeds MD2, and in position #2 (TA₂, TB₂) feeds MD1while (TA₁, TB₁) feeds MD2. On the AC side, similarly, the phase line Asees the phase output line from MD1 and in position #2 it sees the phaseoutput line from MD2. The neutral output line from MD2 goes to theneutral line N when SW5 is in position 190 1, whereas, it is the neutraloutput line from MD1 which goes to line N when SW5 is in position #2. Atthe same time, switch SW3 interchanges the line joining V.sub. and V₂ atthe junction of the two inverters in series. The lower end of V₁ isconnected to the upper end of V₂ by SW3 in position #1, whereas, thelower end of V₂ is connected to the upper end of V₁ when SW3 is inposition #2. On oscillator OSC controls, coils CL1-CL5 which via lines10-14 control the arms of switches SW1-SW5, respectively. This is shownfor the purpose of explanation only.

Referring to FIGS. 6A, 7A, digital control of MD1 and MD2 is shown inthe instance of FIG. 2 and in the instance of FIG. 4, respectively.

Referring to FIG. 6A, an oscillator OSC generates a frequency signal atsize time the fundamental frequency. A counter CNT generates threebinary bits A₀, A₁, A₂ which represent the address of a PROM devicecontaining the following data:

                  TABLE I                                                         ______________________________________                                        LOC      LOC                                                                  BIN      DEC             Q.sub.1                                                                             Q.sub.0                                        ______________________________________                                        000      0               1     0                                              001      1               0     0                                              010      2               0     0                                              011      3               0     1                                              100      4               1     1                                              101      5               1     1                                              ______________________________________                                    

The outputs of the PROM are Q₀ and Q₁ which represent the states of thecontrolling waveform for MD1 and MD2, like curves (a) and (b) of FIG. 8.

FIG. 6B shows Q₀ and Q₁ in time relation to the pulsing signal from theoscillator OSC.

Similarly, but in the instance of swapping the control of the invertersMD1, MD2, an oscillator OSC is shown in FIG. 7A generating a pulse trainat six times the fundamental frequency F. A counter generates on linesA0-A3 the four bits characterizing binary numbers for the address of aPROM device. The PROM contains data representing Q₀ and Q₁ according tothe following table:

                  TABLE II                                                        ______________________________________                                        LOC      LOC                                                                  BIN      DEC             Q.sub.1                                                                             Q.sub.0                                        ______________________________________                                        0000     0               1     0                                              0001     1               0     0                                              0010     2               0     0                                              0011     3               0     1                                              0100     4               1     1                                              0101     5               1     1                                              0110     6               0     1                                              0111     7               0     0                                              1000     8               0     0                                              1001     9               1     0                                              1010     10              1     1                                              1011     11              1     1                                              ______________________________________                                    

FIG. 7B shows the waveform Q₀, Q₁ in time relation with the oscillatorpulse train. Q₀ and Q₁ are no longer exhibiting a regular occurrence ofa front edge and a trailing edge with Q₀ leading constantly Q₁ as inFIG. 6B. Now, alternatively Q₀ will lead Q₁ and Q₁ will lead Q₀, muchlike with curves (b) of FIG. 4.

I claim:
 1. In a multi-inverter system including at least two invertersconnected in series for outputting a compound voltage, the combinationof:means for controlling said inverters to establish a predeterminedphase shift between the respective output voltages of said inverters;and means responsive to a recurrent triggering signal for exchangingsaid inverters under said controlling means, whereby the average powerderived from each inverter as a function of time is balanced out.
 2. Thesystem of claim 1 with said triggering signal responsive means beingeffective to exchange the effect of said controlling means upon saidinverter.
 3. The system of claim 2 with said triggering signal beingperiodical.
 4. The system of claim 3 with said triggering signal beingasynchronously applied.